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<rss version="2.0"><channel><title>mikeash.com pyblog/friday-qa-2011-12-16-disassembling-the-assembly-part-1.html comments</title><link>http://www.mikeash.com/?page=pyblog/friday-qa-2011-12-16-disassembling-the-assembly-part-1.html#comments</link><description>mikeash.com Recent Comments</description><lastBuildDate>Mon, 17 Aug 2026 10:15:27 GMT</lastBuildDate><generator>PyRSS2Gen-1.0.0</generator><docs>http://blogs.law.harvard.edu/tech/rss</docs><item><title>vczilla - 2011-12-31 07:30:43</title><link>http://www.mikeash.com/?page=pyblog/friday-qa-2011-12-16-disassembling-the-assembly-part-1.html#comments</link><description>I'd hate to be an architecture 'nazi' but I couldn't help but notice a mistake concerning memory in the article.
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&lt;br /&gt;It's stated that all physical addresses are 48 bit wide and that bits 48-63 are all zeroes.
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&lt;br /&gt;In fact this is only true for linear addresses (which are addresses before paging translation) and only when the processor is a 64 bit processor in compatibility mode. 
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&lt;br /&gt;Physical addresses are 52 bits (and this is implementation dependent).
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&lt;br /&gt;When the processor is in 64-bit mode all linear addresses must be in what is called a canonical form.
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&lt;br /&gt;Imagine a 48-bit logic address as signed int which is sign extended to 64 bit when stored. 
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&lt;br /&gt;Or said otherwise for that address bits 48 to 64 are a copy of bit 47.
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&lt;br /&gt;In general kernel implementations on different operating systems occupy the negative physical address space. 
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&lt;br /&gt;It's a forward looking compatibility feature.
&lt;br /&gt;That way if in a future implementation they widen physical or linear addresses everything will be at the same relative offset from zero.
&lt;br /&gt;&amp;nbsp;
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&lt;br /&gt;</description><guid isPermaLink="true">22f5b08f5f1355d1abf184ed4f887416</guid><pubDate>Sat, 31 Dec 2011 07:30:43 GMT</pubDate></item><item><title>Scott Little - 2011-12-20 13:11:20</title><link>http://www.mikeash.com/?page=pyblog/friday-qa-2011-12-16-disassembling-the-assembly-part-1.html#comments</link><description>Great stuff! I was thinking that this type of thing would be great to see after Mike's previous article about getting to the Assembly. I do a lot of hacking and swizzling in Mail and am often looking at the assembly of Mail.app and Message.framework, but mostly I don't understand.
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&lt;br /&gt;Thanks for this primer and I'm looking forward to Part 2!</description><guid isPermaLink="true">7ee1144bc55b20f50d5c82941be38c53</guid><pubDate>Tue, 20 Dec 2011 13:11:20 GMT</pubDate></item><item><title>Hugh Fisher - 2011-12-20 01:35:12</title><link>http://www.mikeash.com/?page=pyblog/friday-qa-2011-12-16-disassembling-the-assembly-part-1.html#comments</link><description>BJ Homer, the register naming conventions on x86 are an evolutionary hangover from the dim, distant days of the 1970s.
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&lt;br /&gt;Historically mainframe CPUs, like the IBM 360 which is still with us, had 16 or more general purpose registers numbered from 0. Minicomputers like the PDP-11 had fewer but still general purpose registers, also numbered from 0. You can/could see these influences in the PowerPC and Motorola M68K which used similar naming schemes, as did most RISC architectures.
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&lt;br /&gt;The x86, though, evolved in a pure microprocessor environment. The first 8080 and then 8086 had so few transistors that every register had a unique purpose. You literally could only add numbers in the accumulator (AX) register, you could only use the string index (SI) register to fetch a byte at an offset from an address, and so on. Since there were so few registers and each was different it made sense to give them different names.
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&lt;br /&gt;The 8 bit 8080 had an 8 bit accumulator while the 8086 was 16 bit. Intel wanted the 8086 to be largely source compatible - and that's assembler source compatible - so made it easy to for 8 bit code to use AL. (Why AH, the top 8 bits of a 16 bit accumulator, exists is a mystery to me but presumably it had some purpose.)
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&lt;br /&gt;With the 386 the architects finally had enough transistors to switch to general purpose registers where you could (almost) apply any operation to any register, improving both aesthetics and performance, but the hideous names had to stay for backwards compatibility. In the 1980s and even 1990s PC programs were still often written in assembly language.
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&lt;br /&gt;MMX and SSE, being post 386, got general purpose registers from the start and reg#N names. When AMD extended the x86 architecture to 64 bit addressing they also doubled the number of registers and named them R8 to R15.
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&lt;br /&gt;Computer architecture textbooks in the 1980s and 1990s didn't use the x86 for examples because it was so kludgy, preferring the cleaner 68K/RISC designs. It says something about elegance vs practicality that the x86 is still with us and those others mostly aren't :-(
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&lt;br /&gt;</description><guid isPermaLink="true">cbbfd0859385f6ba64d58ff0976c52dc</guid><pubDate>Tue, 20 Dec 2011 01:35:12 GMT</pubDate></item><item><title>Gwynne Raskind - 2011-12-17 14:16:29</title><link>http://www.mikeash.com/?page=pyblog/friday-qa-2011-12-16-disassembling-the-assembly-part-1.html#comments</link><description>&lt;b&gt;Steve, Alistair:&lt;/b&gt;I'm not very familiar with the ARM architecture at the assembly language level, but I guess this is the perfect time to learn! I'll see what I can do about an ARM version once I've finished part 2, since it seems so popular an idea :).</description><guid isPermaLink="true">a82e3b86cdbea5f21dcd6b47960216c0</guid><pubDate>Sat, 17 Dec 2011 14:16:29 GMT</pubDate></item><item><title>Alistair - 2011-12-17 10:28:10</title><link>http://www.mikeash.com/?page=pyblog/friday-qa-2011-12-16-disassembling-the-assembly-part-1.html#comments</link><description>What a superb article, thanks for taking the time to write it. As someone else said, yes please, a version for ARM. That really took me back!</description><guid isPermaLink="true">641e36f4b9788be2edbca57514f027b1</guid><pubDate>Sat, 17 Dec 2011 10:28:10 GMT</pubDate></item><item><title>Jeroen - 2011-12-17 00:47:58</title><link>http://www.mikeash.com/?page=pyblog/friday-qa-2011-12-16-disassembling-the-assembly-part-1.html#comments</link><description>Geesh that brings back the memories! (of the much nicer 68K and PPC though…)
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&lt;br /&gt;Fire them at the moon so they go splat and remain there as a warning for the future.
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&lt;br /&gt;Great stuff…</description><guid isPermaLink="true">1564a8d6a11978e5a034a31b3b310374</guid><pubDate>Sat, 17 Dec 2011 00:47:58 GMT</pubDate></item><item><title>mikeash - 2011-12-16 17:06:20</title><link>http://www.mikeash.com/?page=pyblog/friday-qa-2011-12-16-disassembling-the-assembly-part-1.html#comments</link><description>Fire them, out of a cannon, into the sun, perhaps?</description><guid isPermaLink="true">d52a2890e4889548496ea2bd3be03573</guid><pubDate>Fri, 16 Dec 2011 17:06:20 GMT</pubDate></item><item><title>BJ Homer - 2011-12-16 16:50:00</title><link>http://www.mikeash.com/?page=pyblog/friday-qa-2011-12-16-disassembling-the-assembly-part-1.html#comments</link><description>This is very useful. I've been meaning to find a good primer on reading assembly for a while, and this couldn't be more appropriate.
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&lt;br /&gt;But who in the world came up with these register names? Can we fire them?</description><guid isPermaLink="true">4b00fa1e4c1a3a128ce7b5ff779496aa</guid><pubDate>Fri, 16 Dec 2011 16:50:00 GMT</pubDate></item><item><title>Steve Weller - 2011-12-16 15:51:06</title><link>http://www.mikeash.com/?page=pyblog/friday-qa-2011-12-16-disassembling-the-assembly-part-1.html#comments</link><description>Please repeat for ARM!</description><guid isPermaLink="true">a1b67f9798f652a6796e771a4ee3c181</guid><pubDate>Fri, 16 Dec 2011 15:51:06 GMT</pubDate></item><item><title>Dave - 2011-12-16 15:23:51</title><link>http://www.mikeash.com/?page=pyblog/friday-qa-2011-12-16-disassembling-the-assembly-part-1.html#comments</link><description>My goodness this is fantastic.  &lt;i&gt;*bookmarked*&lt;/i&gt;</description><guid isPermaLink="true">2d4aad29f89a29d61e3adaa02957be44</guid><pubDate>Fri, 16 Dec 2011 15:23:51 GMT</pubDate></item></channel></rss>
